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- Title
- Protection of layout designs (topographies) of integrated circuits - R. I. P.?
- Creators - without role
- Gunnar W.G. Karnell - Stockholm School of Economics, {Historical} Center for Business Law
- Publication Details
- Äres dem som äras bör!, pp.427-440
- Publisher
- Eddy; Visby
- Number of pages
- 14
- Identifiers
- 991001480584006056
- Academic Unit
- {Historical} Center for Business Law
- Language
- English
- Resource Type
- Book chapter